Abstract
Polarisation and wavelength insensitive 100Gbit/s optical clock recovery using an electrical phaselocked loop consisting entirely of commercially available components is demonstrated. The system exhibits excellent long-term stability, with a timing jitter of ~250fs.
Original language | English |
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Pages (from-to) | 650-652 |
Number of pages | 3 |
Journal | Electronics letters |
Volume | 36 |
Issue number | 7 |
DOIs | |
Publication status | Published - 30 Mar 2000 |
Bibliographical note
Times Cited: 24Keywords
- optical fibre networks
- time division multiplexing
- timing jitter
- phase locked loops
- synchronisation